The lab's lab's research summary provides an overview of the research activities and summarizes selected papers.

Selected Publications

Next Generation Memories & Architectures

New Memory Devices & Applications

  • HR3AM: a Heat Resilient Design for RRAM based Neuromorphic Computing
    Xiao Liu, Minxuan Zhou, Tajana Rosing, and Jishen Zhao the Proceedings of ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED), 2019.
  • Processing-in-Memory for Energy-efficient Neural Network Training: A Heterogeneous Approach
    Hengyu Zhao*, Jiawen Liu*, Matheus A. Ogleari, Dong Li, and Jishen Zhao the Proceedings of International Symposium on Microarchitecture (MICRO), 2018.
  • Leveraging MLC STT-RAM for Energy-efficient CNN Training
    Hengyu Zhao and Jishen Zhao Proceedings of International Symposium on Memory Systems (MEMSYS), 2018.
  • Approximate Image Storage with Multi-level Cell STT-MRAM Main Memory
    Hengyu Zhao*, Linuo Xue*, Ping Chi, and Jishen Zhao Proceedings of the International Conference On Computer Aided Design (ICCAD), 2017. ((The first two authors contribute equally)).
  • PRESCOTT: Preset-based Cross-Point Architecture for Spin-Orbit-Torque Magnetic Random Access Memory
    Liang Chang, Zhaohao Wang, Alvin Oliver Glova, Jishen Zhao, Youguang Zhang, Yuan Xie, and Weisheng Zhao Proceedings of the International Conference On Computer Aided Design (ICCAD), 2017.
  • Leave the Cache Hierarchy Operation as It Is: A New Persistent Memory Accelerating Approach
    Chun-Hao Lai, Jishen Zhao, and Chia-Lin Yang Proceedings of of the 54th Design Automation Conference (DAC), 2017. (Acceptance Rate: 161/676=23.8).
  • A Novel Processing-in-memory Architecture for Neural Network Computation in ReRAM-based Main Memory
    Ping Chi, Shuangchen Li, Cong Xu, Tao Zhang, Jishen Zhao, Yongpan Liu, Yu Wang, and Yuan Xie Proceedings of the 43rd International Symposium on Computer Architecture (ISCA), 2016. (Acceptance Rate: 54/288=18.8).
  • Pinatubo: A Processing in Non-volatile Memory Architecture for Bulk Bitwise Operations
    Shuangchen Li, Cong Xu, Jishen Zhao, Yu Lu, and Yuan Xie Proceedings of the 53rd Design Automation Conference (DAC), 2016. (Acceptance Rate: 152/876=17.4).
  • BACH: A Bandwidth-Aware Hybrid Cache Hierarchy Design with Nonvolatile Memories
    Jishen Zhao, Cong Xu, Tao Zhang, and Yuan Xie Journal of Computer Science and Technology 31:20-35, 2016.
  • Overview of 3D Architecture Design Opportunities and Techniques
    Jishen Zhao, Qiaosha Zou, and Yuan Xie IEEE Design amp; Test, 2015.
  • DimNoC: A Dim Silicon Approach towards Power-Efficient On-Chip Network
    Jia Zhan, Jin Ouyang, Fen Ge, Jishen Zhao, and Yuan Xie Proceedings of the 52nd Design Automation Conference (DAC), 2015. (Acceptance Rate: 162/789=20.5).
  • Core vs. Uncore: The Heart of Darkness
    Hsiang-Yun Cheng, Jia Zhan, Jishen Zhao, Yuan Xie, Jack Sampson, and Mary Jane Irwin Proceedings of the 52nd Design Automation Conference (DAC), 2015. (Invited paper).
  • History-Assisted Adaptive-Granularity Caches (HAAG) for High Performance 3D DRAM Architectures
    Ke Chen, Sheng Li, Jung Ho Ahn, Naveen Muralimanohar, Jishen Zhao, Cong Xu, Seongil O, Yuan Xie, Jay B. Brockman, and Norman P. Jouppi Proceedings of the 29th International Conference on Supercomputing (ICS), 2015. (Acceptance rate: 40/160=25).
  • Overview of Challenges and Design Methodologies in 3D Integrated Circuits
    Qiaosha Zou, Jishen Zhao, and Yuan Xie To appear in IEEE Design amp; Test, 2015.
  • Optimizing GPU Energy Efficiency with 3D Die-stacking Graphics Memory and Reconfigurable Memory Interface
    Jishen Zhao, Guangyu Sun, Gabriel Loh, and Yuan Xie ACM Transactions on Architecture and Code Optimization (TACO) 10(4):24:1-24:25, 2013.
  • MAGE: Adaptive Granularity and ECC for Resilient and Power Efficient Memory Systems
    Sheng Li, Doe Hyun Yoon, Ke Chen, Jishen Zhao, Jung Ho Ahn, Jay B. Brockman, Yuan Xie, and Norman P. Jouppi Proceedings of the International Conference on High Performance Computing, Networking, Storage and Analysis (SC), 2012. (Acceptance rate: 100/472=21).
  • 3D-nonFAR: Three-dimensional Non-volatile FPGA Architecture Using Phase Change Memory
    Yibo Chen, Jishen Zhao, and Yuan Xie Proceedings of the 16th International Symposium on Low Power Electronics and Design (ISLPED), 2010. (Acceptance rate: 52/210=25).

Data-Intensive Computing

Flash Memory

Security and Trust

Error Correction & Coding